PHP45N03LT; PHB45N03LT; PHD45N03LT N-channel TrenchMOS transistor

PHP45N03LT; PHB45N03LT; PHD45N03LT N-channel TrenchMOS transistor Rev. 06 — 05 October 2000

Product specification

1. Description N-channel logic level field-effect power transistor in a plastic package using TrenchMOS™1 technology. Product availability: PHP45N03LT in SOT78 (TO-220AB) PHB45N03LT in SOT404 (D2-PAK) PHD45N03LT in SOT428 (D-PAK).

2. Features ■ Low on-state resistance ■ Fast switching.

3. Applications

c

■ Computer motherboard DC to DC converters ■ Switched mode power supplies.

c

4. Pinning information Table 1:

Pinning - SOT78, SOT404, SOT428 simplified outline and symbol

Pin

Description

1

gate (g)

2

drain (d)

3

source (s)

mb

mounting base, connected to drain (d)

Simplified outline

[1]

Symbol

mb mb

d

mb

g 2 1

2 MBK106

1

3

MBK116

Top view

3 MBK091

1 2 3

SOT78 (TO-220AB)

SOT404 (D2-PAK)

[1]

It is not possible to make connection to pin 2 of the SOT404 or SOT428 packages.

1.

TrenchMOS is a trademark of Royal Philips Electronics.

SOT428 (D-PAK)

MBB076

s

PHP45N03LT series

Philips Semiconductors

N-channel TrenchMOS transistor

5. Quick reference data Table 2:

Quick reference data

Symbol Parameter

Conditions

Typ

Max

Unit

Tj = 25 to 175 °C

−

25

V

VDS

drain-source voltage (DC)

ID

drain current (DC)

Tmb = 25 °C; VGS = 5 V

−

45

A

Ptot

total power dissipation

Tmb = 25 °C

−

86

W

Tj

junction temperature

−

175

°C

RDSon

drain-source on-state resistance

VGS = 10 V; ID = 25 A

16

21

mΩ

VGS = 5 V; ID = 25 A

20

24

mΩ

6. Limiting values Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Conditions

Min

Max

Unit

VDS

Symbol Parameter drain-source voltage (DC)

Tj = 25 to 175 °C

−

25

V

VDGR

drain-gate voltage (DC)

Tj = 25 to 175 °C; RGS = 20 kΩ

−

25

V

VGS

gate-source voltage (DC)

−

±15

V

ID

drain current (DC)

Tmb = 25 °C; VGS = 5 V; Figure 2 and 3

−

45

A

Tmb = 100 °C; VGS = 5 V; Figure 2

−

30

A

IDM

peak drain current

Tmb = 25 °C; pulsed; tp ≤ 10 µs; Figure 3

−

180

A

Tmb = 25 °C; Figure 1

Ptot

total power dissipation

−

86

W

Tstg

storage temperature

−55

+175

°C

Tj

operating junction temperature

−55

+175

°C

Source-drain diode IS

source (diode forward) current (DC)

Tmb = 25 °C

−

45

A

ISM

peak source (diode forward) current

Tmb = 25 °C; pulsed; tp ≤ 10 µs

−

180

A

© Philips Electronics N.V. 2000. All rights reserved.

9397 750 07579

Product specification

Rev. 06 — 05 October 2000

2 of 15

PHP45N03LT series

Philips Semiconductors

N-channel TrenchMOS transistor

03ac97

120

03ac98

120 Ider 110 (%) 100

Pder 110 (%) 100 90

90

80

80

70

70

60

60

50

50

40

40

30

30

20

20

10 0

10 0

20

40

60

80

100

0

120 140 160 180 Tmb (oC)

0

20

40

60

80

100 120 140 160 180 Tmb ( oC)

VGS ≥ 5 V

P tot P der = ---------------------- × 100% P °

ID I der = ------------------- × 100% I °

tot ( 25 C )

D ( 25 C )

Fig 1. Normalized total power dissipation as a function of mounting base temperature.

Fig 2. Normalized continuous drain current as a function of mounting base temperature. 03ac96

103 RDSon = VDS / ID

ID (A) 102

tp = 10 µs tp = 10 us 100 µs

δ=

P

10

tp T

DC

1 ms 10 ms 100 ms

t

tp T

1 1

10

VDS (V)

102

Tmb = 25 °C; IDM is single pulse.

Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.

© Philips Electronics N.V. 2000. All rights reserved.

9397 750 07579

Product specification

Rev. 06 — 05 October 2000

3 of 15

PHP45N03LT series

Philips Semiconductors

N-channel TrenchMOS transistor

7. Thermal characteristics Table 4:

Thermal characteristics

Symbol

Parameter

Conditions

Rth(j-mb)

thermal resistance from junction to mounting base Figure 4

Rth(j-a)

thermal resistance from junction to ambient

Value

Unit

1.75

K/W

vertical in still air; SOT78 package

60

K/W

mounted on a printed circuit board; minimum footprint; SOT404 and SOT428 packages

50

K/W

7.1 Transient thermal impedance 03ac99

10 Zth(j-mb) (K/W) 1

δ = 0.5 0.2

δ=

P

0.1

tp T

0.05

10-1

0.02 t

tp

Single Pulse

T

10-2 10-6

10-5

10-4

10-3

10-2

10-1

1

10 tp (s)

Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.

© Philips Electronics N.V. 2000. All rights reserved.

9397 750 07579

Product specification

Rev. 06 — 05 October 2000

4 of 15

PHP45N03LT series

Philips Semiconductors

N-channel TrenchMOS transistor

8. Characteristics Table 5: Characteristics Tj = 25 °C unless otherwise specified Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Tj = 25 °C

25

−

−

V

Tj = −55 °C

22

−

−

V

Tj = 25 °C

1

1.5

2

V

Tj = 175 °C

0.5

−

−

V

Tj = −55 °C

−

−

2.3

V

Tj = 25 °C

−

0.05

10

µA

Tj = 175 °C

−

−

500

µA

−

10

100

nA

Tj = 25 °C

−

20

24

mΩ

Tj = 175 °C

−

−

45

mΩ

−

−

21

mΩ

8

16

−

S

Static characteristics V(BR)DSS

VGS(th)

IDSS

drain-source breakdown voltage

ID = 0.25 mA; VGS = 0 V

gate-source threshold voltage ID = 1 mA; VDS = VGS; Figure 9

drain-source leakage current

VDS = 25 V; VGS = 0 V

IGSS

gate-source leakage current

VGS = ±5 V; VDS = 0 V

RDSon

drain-source on-state resistance

VGS = 5 V; ID = 25 A; Figure 7 and 8

VGS = 10 V; ID = 25 A; Tj = 25 °C Dynamic characteristics gfs

forward transconductance

VDS = 25 V; ID = 25 A Figure 11

Qg(tot)

total gate charge

Qgs

gate-source charge

ID = 45 A; VDD = 15 V; VGS = 10 V; Figure 14

Qgd

gate-drain (Miller) charge

Ciss

input capacitance

Coss

output capacitance

Crss

reverse transfer capacitance

td(on)

turn-on delay time

tr

turn-on rise time

td(off)

turn-off delay time

tf

turn-off fall time

VGS = 0 V; VDS = 25 V; f = 1 MHz; Figure 12

VDD = 15 V; ID = 25 A; VGS = 5 V; RG = 5 Ω; resistive load

−

35

−

nC

−

5

−

nC

−

13

−

nC

−

920

1100

pF

−

260

310

pF

−

180

220

pF

−

6

7

ns

−

40

48

ns

−

78

84

ns

−

46

52

ns

−

0.95

1.2

V

Source-drain diode VSD

source-drain (diode forward) voltage

IS = 25 A; VGS = 0 V; Figure 13 IS = 40 A; VGS = 0 V

−

1.0

−

V

trr

reverse recovery time

−

52

−

ns

Qr

recovered charge

IS = 40 A; dIS/dt = −100 A/µs; VGS = 0 V; VDS = 25 V

−

0.08

−

µC

© Philips Electronics N.V. 2000. All rights reserved.

9397 750 07579

Product specification

Rev. 06 — 05 October 2000

5 of 15

PHP45N03LT series

Philips Semiconductors

N-channel TrenchMOS transistor

03ad02

03ad00

80 ID

5V

10 V

50

4.5 V

70

Tj = 25 oC

ID

(A) 6V

60

40

(A)

175 oC

4V 50

30

40

3.5 V 20

30 3V

20

10

10

VGS = 2.5 V

0

0

0

2

4

6

8

10

0

1

2

3

4

VDS (V)

5

Tj = 25 °C

Tj = 25 °C and 175 °C; VDS = 25 V

Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values.

Fig 6. Transfer characteristics: drain current as a function of gate-source voltage; typical values.

03ad01

03ad03

2

0.06 RDSon (Ω) 0.05

6

VGS (V)

3V

3.5 V

4V

4.5 V

a 1.5

0.04

0.03

1

5V

0.02

10 V

0.5 0.01

VGS = 15 V

0

0 0

10

20

30

40

50

60

70

80

-100

50

100

150

200

R DSon a = --------------------------R DSon ( 25 °C )

Fig 7. Drain-source on-state resistance as a function of drain current; typical values.

Fig 8. Normalized drain-source on-state resistance factor as a function of junction temperature.

© Philips Electronics N.V. 2000. All rights reserved.

9397 750 07579

Product specification

0

Tj ( oC )

ID (A)

Tj = 25 °C

-50

Rev. 06 — 05 October 2000

6 of 15

PHP45N03LT series

Philips Semiconductors

N-channel TrenchMOS transistor

03aa33

2.5 V

(V)

ID (A) 10-2

max

2 typ

10-3

1.5 min

1

10-4

0.5

10-5

min

typ

max

10-6

0 -60

-20

20

60

100

0

140 180 Tj (oC)

0.5

1

1.5

2

2.5

3

VGS (V)

Tj = 25 °C; VDS = 5 V

ID = 1 mA; VDS = VGS

Fig 9. Gate-source threshold voltage as a function of junction temperature. 03ad06

30

gfs

03aa36

10-1

GS(th)

25 Tj = 25 oC

(S)

Fig 10. Sub-threshold drain current as a function of gate-source voltage. 03ad07

104 Ciss, Coss, Crss (pF)

20 175 oC

15

103

Ciss

10

Coss

5

Crss

102

0 0

10

20

30

40

10-1

50

Tj = 25 °C and 175 °C; VDS > ID × RDSon

102

10

VGS = 0 V; f = 1 MHz

Fig 11. Forward transconductance as a function of drain current; typical values.

Fig 12. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values.

© Philips Electronics N.V. 2000. All rights reserved.

9397 750 07579

Product specification

1

VDS (V)

ID (A)

Rev. 06 — 05 October 2000

7 of 15

PHP45N03LT series

Philips Semiconductors

N-channel TrenchMOS transistor

03ad08

60

03ad09

10 9

50

VGS

IS Tj = 175 oC

(A) 40

8

ID = 45A

7

VDS = 15V

(V) Tj = 25 oC

6

30

5 4

20

3 2

10

1 0

0 0

0.5

1

1.5

2

0

5

VSD (V)

15

20

25

30

35

40

QG (nC)

Tj = 25 °C and 175 °C; VGS = 0 V

ID = 45 A; VDS = 15 V

Fig 13. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values.

Fig 14. Gate-source voltage as a function of gate charge; typical values.

© Philips Electronics N.V. 2000. All rights reserved.

9397 750 07579

Product specification

10

Rev. 06 — 05 October 2000

8 of 15

PHP45N03LT series

Philips Semiconductors

N-channel TrenchMOS transistor

9. Package outline Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB

E

SOT78

A A1

P

q

mounting base

D1

D

L1

L2(1)

Q b1

L

1

2

3 b

c

e

e

0

5

10 mm

scale DIMENSIONS (mm are the original dimensions) (1)

UNIT

A

A1

b

b1

c

D

D1

E

e

L

L1

L2 max.

P

q

Q

mm

4.5 4.1

1.39 1.27

0.9 0.7

1.3 1.0

0.7 0.4

15.8 15.2

6.4 5.9

10.3 9.7

2.54

15.0 13.5

3.30 2.79

3.0

3.8 3.6

3.0 2.7

2.6 2.2

Note 1. Terminals in this zone are not tinned. OUTLINE VERSION

REFERENCES IEC

SOT78

JEDEC

EIAJ

3-lead TO-220AB

SC-46

EUROPEAN PROJECTION

ISSUE DATE 99-09-13 00-09-07

Fig 15. SOT78 (TO-220AB). © Philips Electronics N.V. 2000. All rights reserved.

9397 750 07579

Product specification

Rev. 06 — 05 October 2000

9 of 15

PHP45N03LT series

Philips Semiconductors

N-channel TrenchMOS transistor

Plastic single-ended surface mounted package (Philips version of D2-PAK); 3 leads (one lead cropped)

SOT404

A A1

E

mounting base

D1

D

HD

2 Lp

1

3 c

b e

e

Q

0

2.5

5 mm

scale

DIMENSIONS (mm are the original dimensions) UNIT

A

A1

b

c

D max.

D1

E

e

Lp

HD

Q

mm

4.50 4.10

1.40 1.27

0.85 0.60

0.64 0.46

11

1.60 1.20

10.30 9.70

2.54

2.90 2.10

15.40 14.80

2.60 2.20

OUTLINE VERSION

REFERENCES IEC

JEDEC

EIAJ

EUROPEAN PROJECTION

ISSUE DATE 98-12-14 99-06-25

SOT404

Fig 16. SOT404 (D2-PAK) © Philips Electronics N.V. 2000. All rights reserved.

9397 750 07579

Product specification

Rev. 06 — 05 October 2000

10 of 15

PHP45N03LT series

Philips Semiconductors

N-channel TrenchMOS transistor

Plastic single-ended surface mounted package (Philips version of D-PAK); 3 leads (one lead cropped)

SOT428

seating plane y A E

A2

A A1

b2

D1

mounting base

E1 D HE L2

2 L1

L

1

3

b1

w M A

b

c

e e1

0

10

20 mm

scale DIMENSIONS (mm are the original dimensions) A UNIT max. 2.38 2.22

mm

A1(1)

A2

b

b1 max.

b2

c

0.65 0.45

0.89 0.71

0.89 0.71

1.1 0.9

5.36 5.26

0.4 0.2

D1 E D max. max. max.

E1 min.

6.22 5.98

4.0

6.73 6.47

4.81 4.45

e

e1

2.285 4.57

HE max.

L

L1 min.

L2

w

y max.

10.4 9.6

2.95 2.55

0.5

0.7 0.5

0.2

0.2

Note 1. Measured from heatsink back to lead. OUTLINE VERSION SOT428

REFERENCES IEC

JEDEC

EIAJ

TO-252

SC-63

EUROPEAN PROJECTION

ISSUE DATE 98-04-07 99-09-13

Fig 17. SOT428 (D-PAK) © Philips Electronics N.V. 2000. All rights reserved.

9397 750 07579

Product specification

Rev. 06 — 05 October 2000

11 of 15

PHP45N03LT series

Philips Semiconductors

N-channel TrenchMOS transistor

10. Revision history Table 6:

Revision history

Rev Date

CPCN

Description

06

20001005

-

Supersedes Rev. 05; reformatted; dynamic characteristics improved.

05

20000524

-

Supersedes Rev. 04 (archived)

04

19980601

-

Supersedes Rev. 03 (archived)

03

19980101

-

Supersedes Rev. 02 (archived)

02

19970609

-

Supersedes Rev. 01 (archived)

01

19971121

-

Product specification

© Philips Electronics N.V. 2000. All rights reserved.

9397 750 07579

Product specification

Rev. 06 — 05 October 2000

12 of 15

PHP45N03LT series

Philips Semiconductors

N-channel TrenchMOS transistor

11. Data sheet status Datasheet status

Product status

Definition [1]

Objective specification

Development

This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice.

Preliminary specification

Qualification

This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.

Product specification

Production

This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.

[1]

Please consult the most recently issued data sheet before initiating or completing a design.

12. Definitions

13. Disclaimers

Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook.

Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.

Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.

Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.

© Philips Electronics N.V. 2000 All rights reserved.

9397 750 07579

Product specification

Rev. 06 — 05 October 2000

13 of 15

PHP45N03LT series

Philips Semiconductors

N-channel TrenchMOS transistor

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Internet: http://www.semiconductors.philips.com

(SCA70)

© Philips Electronics N.V. 2000. All rights reserved.

9397 750 07579

Product specification

Rev. 06 — 05 October 2000

14 of 15

PHP45N03LT series

Philips Semiconductors

N-channel TrenchMOS transistor

Contents 1 2 3 4 5 6 7 7.1 8 9 10 11 12 13

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Transient thermal impedance . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 12 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 13 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

© Philips Electronics N.V. 2000.

Printed in The Netherlands

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 05 October 2000

Document order number: 9397 750 07579