High speed digital CMOS 2D optical position sensitive detector

June 24, 2017 | Autor: Massimo Gottardi | Categoría: Optical Sensor, Power Consumption, High Speed, Solid State Devices and Circuits, Parallel Computer
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ESSCIRC 2002

High Speed Digital CMOS 2D Optical Position Sensitive Detector Nicola Massari IRST, via Sommarive 16, 38050 Povo, Trento, Italy [email protected]

Massimo Gottardi IRST, via Sommarive 16, 38050 Povo, Trento, Italy [email protected]

Lorenzo Gonzo IRST, via Sommarive 16, 38050 Povo, Trento, Italy [email protected]

Andrea Simoni IRST, via Sommarive 16, 38050 Povo, Trento, Italy [email protected]

Abstract In this paper we present a 2-D optical sensor array for position sensing applications. The 20 by 20 pixels sensor implements an analog intensive parallel computation for the estimation of the centroid of a light distribution impinging on the photosensitive area. The photogenerated signal is first analog preprocessed by means of a distributed image peak detector; contour digitization follows for extracting the image centroid position. The   CMOS technology sensor, fabricated in standard performs up to 250k frames/s and exhibits a power consumption which is proportional to the square root of the number of pixels.

1.

Introduction

Various kinds of optical sensors systems for tracking and displacement sensing are needed in industrial and commercial applications. Typical examples include centering and focusing of the pick-up laser beam in optical data storage device and distance measurement on the optical triangulation principle [1-3]. A typical measuring geometry includes a collimated emitter source, as a laser diode, pointing the target and the position sensitive detector, PSD, as receiving device which collects a portion of the back-reflected light from the target. The position of the spot on the PSD is related to the target position and distance from the source. Analog position sensitive detectors, PSD, relies an 1-D or 2- D lateral effect photodiodes or quadrant detectors to extract signal currents which are proportional to the centroid of the light distribution impinging on the sensitive area. They are largely, used in in CD- ROMs to center and focus the pick-up laser beam on the disk track to be read [4]. Analog sensors are mainly fabricated with custom processes which are optimized for low noise and response speed but do not allow integration of the readout electronics [5]. On the other side there are examples of analog PSD fabricated in CMOS [6] which integrate at chip level the readout electronics, but they are

slow in terms of centroid calculation. Research progresses in integrated optical sensors and technological advances in standard CMOS processes have recently promoted the use of digital integrated 1D or 2D arrays as PSD especially in applications requiring utmost accuracy and sensitivity. In this case the light distribution impinging on the active area is digitized and complex signal processing can be performed on chip. However, while the problem of speed might be somewhat reduced when using 1-D digital arrays [7], for 2-D digital arrays is not easy to reach measurement speed exceeding the standard video frame rate. We present in this paper a novel architecture of a 2D digital array working as PSD which performs position measurement up to 250kHz and whose power consumption is lower than 5mW. The device was entirely fabricated in standard CMOS technology and uses both analog and digital processing at pixel and bit-line levels respectively.

2. Priciple of Operation The sensor uses intensive analog computation to estimate the 2D centriod of a light spot. The measurement principle is explained in Fig. 1 and simplified for the one dimensional case. After the image is captured, two spot outlines are generated at row and column levels and compared with a proper threshold, generating thus two binary images on x and y axes. The light spot centroid is computed by averaging the position of the two most external edges of each binary image. The two spot outline are generated by voltage peak detectors organized in rows and columns. The pixel p(i,j) is connected to the i-th row (  ) and the j-th column bit-line (  ) by means of two bipolar transistors working as distributed low peak detectors. The pixel, which detects the highest light intensity among its row, exhibits the lowest output voltage, setting thus the row bit-line to its own output voltage. This makes the other pixels of the same row to disconnect from the bitline. At the end of the integration time, the i-th row and jth column bit-lines provide the output voltage of the most illuminated pixel. The voltage threshold, used to generate

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the two binary images, is derived from a global bit-line shared among all the pixels of the array. Its voltage represents the absolute peak intensity impinging on the sensor. Depending on the spot shape, the threshold can be adjusted in order to optimise the binarization and to make the centroid estimation algorithm to be insensitive to light intensity variations. For each frame, the algorithm of centroid estimation can be executed several times, each one with a different value of threshold in order to increase the measurement resolution.

3.

Circuit Description

In Fig. 2 the schematic block of the PSD is depicted. The sensor consists of an array of 20 by 20 pixels, each one of them is connected to one row, one column and to the global bit-line. Each row and column bit-line feeds a clocked comparator which compares the input signal with the voltage threshold. The Threshold Generator block, consisting of an external DAC, which provides the proper voltage thresholds to the sensor. Its output voltage ranges between the actual global peak value and the pixel reset voltage (  ). A control logic selects the proper output voltage depending on the type of resolution the sensor is intended to work with. After the two spot outlines are binarized, as shown in Fig. 1, a priority-net detects the two most external transitions occuring on each binary image and writes their locations in sequence onto the data bus. For each axis, the centroid position is extracted by computing the average between the two digital values written on the output bus. For each image acquisition, multiplethreshold computation is possible if higher resolution is required. In this case a pulsed light source must be used to guarantee a constant photogenerated signal during the entire processing cycle. After the first centroid estimation, a new image binarization can be executed by changing the threshold voltage and by clocking the comparators once again. A new couple of pixels is provided and the resulting new centroid position will be:



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where /10 is the number of processing cycles executed within one frame. The core of the analog computation is implemented at pixel level. Figure 3 shows the pixel schematic with bias circuits. Under reset, the photodiode is precharged to 2 as well as the rows, columns and global line. After integrating the light, the sensing node a is buffered by the source-follower M2 which pulls down the node b linearly with the light intensity impinging on the photodiode. Thus, the row (column) voltage is driven by that vertical bipolar transistor VPNP whith the lowest base voltage. All the other pixels are disconnected from that row (column) having a lower  3 4 with respect to the winner. At the end of the integration time, each row (column) provides a voltage corresponding to a local light intensity peak.

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The same operation is accomplished on the global-line for each pixel of the imager, extracting thus the absolute peak of the light spot ( 6573 8 ). During the reset phase, the base of the three VPNPs has to be precharged to its starting voltage. This is accomplished by connecting the drain of M2 to 9;: $@?BACED F junction is temporary forced to forward bias setting b to ( 2GHGJIKML ) where L is the junction buit-in voltage. Being all the base-emitter junctions in reverse conditions, no dc power consumption occurs during the pixel reset. After reset, 9 :1 from right

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References

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[1] Symmons Industries Inc, “Ultra-sense, sensor faucet with position sensitive detection”, Product information, Braintree, Massachusetts, USA (1999). [2] Stenberg L., SiTek’s PSD-scool. Products & News 19952000. Newsletter SiTek Electro Optics, Partille, Sweden.

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[3] S. Speiss, M. Vincze and M. Ayromlou, “On the calibration of a 6-D laser tracking system for dynamic robot measurements”, IEEE Trans. on Instrumentation and Measurements, vol. 47, 1998, pp 270-274.

[6] F.R. Riedijk , T. Smith, and J.H. Huijsing, “An integrated optical position-sensitive detector with digital output and error correction”, Sensors and Actuators A, vol. SC-30, Sep. 1993, pp. 1-2.

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[4] K. Pohlman, “The compact disk handbook”, The computer music and Digital Audio Series Vol. 5, A-R Editions, 1992. [5] Hamamatsu Product Catalog. www.hamamastsu.com, Position Sensitive Device

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[7] L. Gonzo, M. Gottardi, A. Simoni, D. Stoppa, J.A-Beraldin, F. Blais, M. Rioux and J. Domey, “Smart Sensors for 3D Digitization”, Proc. IMTC 2001, Budapest, 2001 [8] A. Makynen, T. Rahkonon, and J. Kostamovaara, “A CMOS Binary Position-Sensitive Photodetector (PDS) Ar-

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