Base De Tiempo Combinacionales 2

June 24, 2017 | Autor: Saul Zea | Categoría: Ingenieria De Sistemas
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Descripción

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library IEEE;
use IEEE.STD_LOGIC_1164.all;
use IEEE.STD_LOGIC_arith.all;
use IEEE.STD_LOGIC_unsigned.all;

entity base_1ms is
port(
reloj, reinicio : in STD_LOGIC;
q : out STD_LOGIC
);
end base_1ms;

--Base de tiempo de 1 ms

architecture base_1ms of base_1ms is
signal ctap, ctaf:STD_LOGIC_VECTOR (15 downto 0);
signal qp, qf:STD_LOGIC;
begin
-- Combinacional
fsm1m:process(ctap, qp)
if(qp = '0') then
ctaf
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