A Low-voltage, Analog Power-law Function Generator G. Fikos, L. Nalpantidis and S. Siskos Electronics Lab., Physics Department Aristotle Univ. of Thessaloniki Thessaloniki, Greece
[email protected] Abstract—A simple low voltage circuit topology able to generate any positive real number power-law function is presented. The proposed circuit exploits BJTs and is based on piecewise linear approximation of the nonlinear function to be generated. An in-depth mathematical analysis is deployed. The instances of a squarer, a cube-law, a square rooting and cube rooting circuit are thoroughly examined through simulation. The obtained results verify the theoretical calculations.
I.
CIRCUIT DESCRIPTION
A. Principle of operation The topology of the proposed piecewise linear approximation circuit is shown in Fig. 1. All the external voltages Vref , k could easily be produced by a resistive voltage divider. The key idea is that by appropriate choice of the various Vref , k it could be ideally ensured that only
INTRODUCTION
Circuits exhibiting integer power-law transfer characteristic are used in measurement devices to implement RMS to dc conversion [1] and linearization of sensors' transfer functions that exhibit radical behavior. Nonlinear device modeling [2] and frequency multiplication are other fields that exploit such circuits. In the field of telecommunication systems, digital modulation techniques utilize squarers (BPSK) or circuits generating greater integer powers (QPSK, MPSK) in order the receiver to retrieve the carrier [3]. The concept of piecewise linear approximation of nonlinear functions has been studied [4], using current conveyors [5] and operational transconductance amplifiers [6,7]. In this work we propose a simple topology similar to that of [8], consisting of differential pairs, able to approximate a power law function. The active elements of the proposed circuit are BJTs since balanced differential pairs using BJTs can work at low voltage because they need only two stacked transistors. A drawback of the linear piecewise approximation technique is that the transition from one linear segment to the next one is rough. The problem of the non-smooth transition of the curve through the breaking points is inherently confronted by the nature of the observed nonlinearity of each segment near the breaking points. This feature is owed to the exponential behavior of the transistors.
0-7803-9390-2/06/$20.00 ©2006 IEEE
II.
one differential pair operates in the linear region for a given input voltage. The multiplication factors Mk express the number of identical transistors connected in parallel and consequently the multiplication factor of its collector current relative to a transistor’s having M=1. The bias voltage Vbias is applied to the bases of the transistors. Each transistor of a balanced source-coupled differential pair exhibits a characteristic that is described by the hyperbolic tangent (tanh) function [9] overlaying on a dc term,
I out , i =
I bias , i [1 + tanh (x )] . 2
(1)
where I out ,i is the i-th differential pair’s output current (see
Fig. 1. Proposed piecewise linear approximation circuit
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ISCAS 2006
fig. 1), x =
∆Vin ,i , I bias ,i is the i-th pair’s tail current, and 2VT
∆Vin ,i is the i-th pair’s differential input voltage. Since hyperbolic tangent can be expanded using Taylor series, it can be derived that
I out ,i =
I bias,i
1 2 17 7 (1 + x − x 3 + x 5 − x + ...) 2 3 15 315
(2)
for ( x < π ) . The good linearity of the characteristic for small values of the differential input voltage is evident from (2) since the higher order terms can be neglected. As the differential input voltage approaches a certain value ± 2VT the higher order terms become significant and the differential pair's characteristic gradually deviates from linearity. In the case of cascaded multiple differential pairs, as shown in Fig. 1, the higher order nonlinear terms can be canceled by appropriate selection of the reference voltages Vref,i of successive differential pairs. This feature is feasible due to the fact that hyperbolic tangent is an odd function,
tanh (− x ) = − tanh( x ) . (3) As a consequence I out ,i is symmetrical relatively to its quiescent point. For values of the differential voltage greater than 2VT the output current is considered practically constant. The slope of the curve for small values (absolutely smaller than 2VT) of the differential input voltage is almost constant and equal to the transconductance of the transistor for its quiescent collector current being half the bias current of the pair. The total circuit’s output current Iout is the sum of the n differential pairs’ output currents (see Fig. 1). By choosing the reference voltages appropriately, it can be obtained a segmentally linear curve with smooth transitions through the breaking points. The slope of each segment can be arbitrarily set through the bias current of the corresponding differential pair. B. Mathematical Analysis The following mathematical analysis is valid for any positive integer power m. In order the circuit to exhibit an m-power-law transfer characteristic, the bias current of the k-th differential pair is chosen to be
I bias , k = k
m −1
I bias
(4)
Since the width of the linear transition is independent of the function to be implemented and the exact segment to which it is correlated, we choose the k-th differential pair’s reference voltage to be
Vref , k = kVR
(5)
where VR is a constant voltage expressing the width of the linear region. The k-th differential pair provides an almost linear output current for input voltages within a range of ± VR / 2 around its central valueVref , k . Any input voltage within the operation range can be written, using (5), as
Vin = Vref ,k + ∆V = kVR + ∆V where
∆V ≤
(6)
VR . 2
The circuit’s output current is the sum of the currents of the differential pairs, operating out of the linear region, for which it stands
Vin − Vref , i ≥
VR 2
(7)
contributing thus Ibias,i each, and the current of the k-th’s pair (operating in the linear region) for which it stands
Vin − Vref , i ≤
VR . 2
I bias , k
contributing
2
+
(8)
I bias ,k ∆V . The rest differential pairs 4VT
contribute no current to the output, since their reference voltage is adequately bigger than the input voltage. Consequently
I out = ∑ I out ,i = i
= I bias
( k −1)
∑i i =1
m −1
( k −1)
∑I i =1
bias ,i
I bias , k I bias ,k + + ∆V 4VT 2
k m −1 I bias k m −1 I bias + + ∆V 2 4VT
(9)
The summation that appears in (9) can be calculated taking into account the Faulhaber formula that is k −1
∑ i m −1 =
where I bias is a constant current.
i =1
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m 1 n δ (−1) j ( m−1) Bm − j (k − 1) j ∑ m j =1 j
(10)
where
δ j ( m−1) is
m
the Kronecker delta, are the j
binomial coefficients, and B j are the Bernoulli numbers. Substituting (10) to (9) and neglecting any remaining term whose order is (m-2) or smaller it can be derived that
I out
k m k m−1 ≈ I bias + ∆V m 4VT
m m = A∑ (kVR )m − j ∆V j j =0 j
i =1
I out ≈ A(k mVR + mk m −1VR
m −1
∆V ) .
km ≈ − k m −1 m
(16)
is valid also for any positive real number m. Replacing to (9) it is obtained
I out
(12)
(13)
Comparison of (11) and (13) leads to the conclusion that
VR = 4VT I bias A= m m(4VT )
m −1
k m k m −1 k m −1 ≈ I bias − + ∆V 2 2nVT m
(17)
It has been demonstrated that for large values of k and small values of m (m
