CPU

MPEG2 video decompression on a multiprocessing VLIW microprocessor

Computer Architecture / Data Compression / Video Compression / CPU / Instruction Set Architecture / VLIW / Decoding / Instruction Sets / VLIW / Decoding / Instruction Sets

MPEG2 video decompression on a multiprocessing VLIW microprocessor

Computer Architecture / Data Compression / Video Compression / CPU / Instruction Set Architecture / VLIW / Decoding / Instruction Sets / VLIW / Decoding / Instruction Sets

Energy-efficient CPU frequency control for the Linux system

Operating Systems / System Identification / Optimal Control / Computer Networks / Linux Kernel / Green Computing / Dynamic programming / Energy efficiency / CPU / Energy Efficient Data Centers / Linux system adminstration / Green Computing / Dynamic programming / Energy efficiency / CPU / Energy Efficient Data Centers / Linux system adminstration

Central Processing Unit

CPU

MPEG-2 video decompression on a multiprocessing VLIW microprocessor

Computer Architecture / Data Compression / Video Compression / CPU / Instruction Set Architecture / VLIW / Decoding / Instruction Sets / VLIW / Decoding / Instruction Sets

Parallel VLSI detailed routing using general-purpose computing on graphics processing unit

Routing / VLSI / CPU / Very Large Scale Integration / Gpgpu / Instruction Sets / Central Processing Unit / Integrated Circuit Design / Instruction Sets / Central Processing Unit / Integrated Circuit Design

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