Thin Solid Films 459 (2004) 37–40
High quality SiGe electronic material grown by low energy plasma enhanced chemical vapour deposition b ¨ ¨ a ¨ e, T. Hackbarthc, H. von Kanel D. Chrastinaa,*, G. Isellaa, B. Rossner , M. Bollanid, E. Muller a
INFM and L-NESS Dipartimento di Fisica, Politecnico di Milano, Polo Regionale di Como, Via Anzani 52, I-22100 Como, Italy b ¨ Festkorperphysik, ¨ ¨ ¨ Laboratorium fur ETH Zurich, CH-8093 Zurich, Switzerland c DaimlerChrysler AG, Research and Technology, D-89081 Ulm, Germany d INFM and L-NESS Dipartimento Scienza dei Materiali, Universita´ di Milano Bicocca, Via Cozzi 53, I-20125 Milano, Italy e ¨ Mikro- und Nanotechnologie, PSI Wurenlingen ¨ Labor fur und Villigen, CH-5232 Villigen PSI, Switzerland Available Online February 21 2004
Abstract Low energy plasma enhanced chemical vapour deposition (LEPECVD) is a relatively new growth method, which has been used to create high quality epitaxial silicon germanium material on conventional Si(001) wafers. This material is eminently suitable for electronic devices. The best performance for n-type and p-type conduction is seen in tensile-strained Si and compressively strained Ge quantum wells, respectively. Since such quantum wells cannot be grown directly on a silicon substrate, a virtual substrate (VS) is first grown. The reactive conditions within the plasma make it possible to grow the VS at rates of up to 10 nmsy1 independent of substrate temperature. The quantum wells were grown using a lower plasma intensity, at growth rates of approximately 0.3 nmsy1. The electrical properties of the material compare very well with molecular beam epitaxy (MBE) references, and hybrid material where the buffer is grown by LEPECVD and the electrically active layers are grown by MBE. In addition, the structural quality of the material is analysed by atomic force microscopy, transmission electron microscopy and defect etching. 䊚 2003 Elsevier B.V. All rights reserved. PACS: 72.20Fr; 73.21.Fg; 73.63.Hs; 61.72.Ff; 81.15.Gh Keywords: Silicon–germanium (SiGe); Virtual substrate; Relaxed buffer; MODFET
1. Introduction Relaxed graded silicon germanium buffer layers greatly extend the possibilities of the silicon germanium material system. Such a relaxed buffer layer, or virtual substrate, allows the growth of a tensile strained silicon quantum well for n-type conduction. Also, it is possible to grow compressively strained quantum wells for ptype conduction with any germanium fraction w1x. Such structures can have excellent electrical properties w2–5x. However, a typical graded virtual substrate is several microns thick and substantial reduction of buffer layer thickness is desirable. In fact, various methods
*Corresponding author. Tel.: q39-031-3327613; fax: q39-0313327617. E-mail address:
[email protected] (D. Chrastina).
have been developed over the past few years to arrive at highly relaxed SiGe layers as thin as 100 nm w6x. However, some of these methods require low temperature growth, which cannot be realized by chemical vapour deposition (CVD) since growth rates decrease exponentially as Ts is reduced. Other methods employ ion implantation of H or He into a strained SiGe film, and subsequent thermal treatment w7,8x. This leads to bubble formation, facilitating dislocation loop nucleation close to the interface. Except for the extra processing steps this method appears very attractive but seems to be limited to virtual substrates with Ge content below 30% w8x. We have developed a method to grow thin relaxed SiGe buffers by low-energy plasma enhanced chemical vapour deposition (LEPECVD) w9x. Here we focus on electrical structures grown on these thin buffers.
0040-6090/04/$ - see front matter 䊚 2003 Elsevier B.V. All rights reserved. doi:10.1016/j.tsf.2003.12.090
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D. Chrastina et al. / Thin Solid Films 459 (2004) 37–40
The thin one-stage buffer itself (6636 and 6672) consisted of 500 nm of Si0.56Ge0.44 grown at a substrate temperature of 400 8C. The growth rate was 2 nmsy1 so the growth time was less than 4 min. All the n-type samples are grown on buffers with an effective Ge content of 40%, which allows both a high sheet carrier density and a high mobility w11x. The thin two-stage buffer (6519) consisted of 150 nm of Si0.55Ge0.45 followed without interruption by 220 nm of Si0.28Ge0.72 grown at a substrate temperature of 400 8C. In this case, the whole buffer was grown in 2 min. 3. Results and discussion 3.1. Material quality
Fig. 1. n-type active structures featuring a 9 nm pure Si channel grown by MBE on various virtual substrates. Upwards triangles (m) represent a conventional LEPECVD buffer (C2856y6459) nominally graded to 40% at 10% mmy1. Downwards triangles (%) represent the one-stage thin LEPECVD buffer (C2929y6636).
2. Experimental details High resistivity ()1500 V cm) Si(001) wafers were used throughout. Before growth, the wafers were RCA cleaned and then dipped in ;5% HF solution to remove the native oxide. In each case, a silicon buffer of 100– 150 nm was first grown at 750 8C to ensure a clean surface for SiGe growth. Double crystal X-ray diffraction (XRD) in (004) and (224) directions was used to determine film composition and relaxation. The structural quality of the films was examined by cross-section transmission electron microscopy (TEM). Surface roughness measurements and etch pit counting were done using atomic force microscopy (AFM). Mobility spectrum analysis was used, where stated, to extract the channel mobility from room temperature longitudinal and transverse magnetoresistance measurements w10x. In order to produce etch pits which are clearly visible by AFM, defect etching consumes ;500 nm of material. Since this is the nominal thickness of the thin buffers, most of the buffer would be removed and the observed defect density would be representative of the bottom of the buffer rather than the top. Therefore, for the purposes of measuring the threading dislocation (TD) density by defect etching, samples were grown which featured thin buffers overgrown with 700 nm of Si0.6Ge0.4 at Ts of 630 8C.
More details of material optimization and characterisation will be presented elsewhere w9x. In summary, the one-stage virtual substrate is 93% relaxed as grown (at a substrate temperature of 400 8C) with rms roughness 1.8 nm and peak-valley height range of 8.9 nm. The surface has a cross hatch morphology. The TD density measured by etch pit counting is approximately 3=108 cmy2 which is not expected to limit the mobility at room temperature w12x. 3.2. n-type structures Identical electrically active structures were grown by MBE on three different virtual substrates. The structure features a 9 nm pure Si channel remotely doped with Sb. The setback between the channel and the dopant is 10 nm. Hall effect results (uncorrected for parallel conduction) are shown in Fig. 1. Room temperature results are summarized in Table 1. The best performance comes from the structure grown on a 5 mm 40% graded virtual substrate grown by LEPECVD. The nominal grading rate was 10% mmy1, with a 1 mm constant composition part. Mobility below 10 K approaches 100 000 cm2 Vy1 sy1. At low temperature, the mobility in the structure grown on the thin buffer is greater than 10 000 cm2 Vy1 sy1. The mobility in the structure grown on the 2.5 mm MBE virtual substrate (graded at 20% mmy1 with a 0.5 mm constant composition part) was 7900 cm2 Vy1 sy1 at 77 K, with a sheet density of 1.15=1012 cmy2. At room temperature, the one-stage buffer performs almost as well as graded buffers which are 5–10 times thicker. For device applications, this small shortfall in performance could be offset by the enhanced thermal dissipation to the silicon substrate through the buffer. Transistors with 70 nm gate length have been fabricated on these one-stage virtual substrates, and the initial results reveal f max better than 110 GHz and f t better than 50 GHz. (The same devices fabricated on thick
D. Chrastina et al. / Thin Solid Films 459 (2004) 37–40
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Table 1 Summary of electrical properties at 300 K. Hall effect (uncorrected for parallel conduction) and mobility spectrum (‘QW’) results are shown. Si channel devices are n-type, the others are p-type Reference
Buffer
Channel
nHall (1011 cmy2)
mHall (cm2 Vy1 sy1)
nQW (1011 cmy2)
mQW (cm2 Vy1 sy1)
C2856y6459 C2929y6636 C2586 6672 6519
5 mm LEPECVD 500 nm 1-stage 2.5 mm MBE 500 nm 1-stage 370 nm 2-stage
9 nm Si 9 nm Si 9 nm Si 10 nm Si0.23Ge0.77 7 nm Ge
19 12 12 21 13
1700 1520 1610 320 1070
11 11 8.1 5.8 3.8
2070 1590 1850 740 1900
graded virtual substrates give f t of 63 GHz and f max of 128 GHz). These results will be presented elsewhere. 3.3. p-type structures Fig. 2 presents results from a 7 nm pure Ge channel on a two-stage thin buffer, and results from a 10 nm Si0.23Ge0.77 channel on a one-stage buffer. Whilst the two-stage buffer is not yet optimized, the results are promising. At low temperature, the results compare well with MBE-grown material w13x. At room temperature, the channel hole mobility as extracted by mobility spectrum exceeds the bulk value. The mobility calculated from low-field magnetoresistance assuming the single-channel Hall effect is also given in Table 1. The fall in channel sheet density as temperature increases is caused by the movement of the Fermi level away from the valence band as impurities become ionized. This effect is seen in Ge channel devices when
mobility spectrum analysis is used w14x. Because of parallel conduction through doped bulk material, the familiar Hall effect (single-carrier) sheet density increases with increasing temperature w4x. This demonstrates the importance of mobility spectrum analysis. In contrast, the channel sheet density of the p-type device on a one-stage buffer is not strongly dependent on temperature up to 300 K, since the band gap of the Si0.6Ge0.4 material surrounding the channel is wider than the band gap of the Si0.3Ge0.7 material which surrounds the channel of the two-stage device w15x. (This also explains why there is no strong temperature dependence of the channel sheet density in the n-type devices.) The results for p-type conduction on the one-stage buffer compare well with published results for channels of similar composition grown on conventional graded buffer layers w16x. 4. Conclusion In conclusion, the growth of thin virtual substrates for strained Si or SiGe channel devices by LEPECVD has been demonstrated. At 500 nm or less, they are 5– 10 times thinner than standard graded buffers. The buffers are grown in one or two steps depending on the Ge content. Neither complicated thermal cycling nor ion implantation is required. We use a gas phase process suitable for high volume production. The electrical results demonstrate that this material is suitable for high speed electronics. Acknowledgments Financial support from GROWTH Program ECOPRO No. GRD2-2000-30064 and EC, frame of IST-1999SIGMUND and German Bmbf Project Ultra2 is gratefully acknowledged. References
Fig. 2. Upwards triangles (m) represent a device (6519) featuring a 7 nm pure Ge channel on a two-stage thin buffer. Downwards triangles (%) represent a device (6672) featuring a 10 nm Si0.23Ge0.77 channel on a one-stage thin buffer. All points were found using mobility spectrum analysis, apart from those at 2 K and 20 K.
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