A Low Voltage Low Noise Amplifier for Radio Frequency Applications Fco. R. Trejo-Macotela
Alejandro Díaz-Sánchez
Jaime Ramírez-Angulo
Institute of Astrophysics, Optics and Electronics (INAOE), Tonantzintla, Pue. MEXICO.
[email protected]
Institute of Astrophysics, Optics and Electronics (INAOE), Tonantzintla, Pue. MEXICO.
[email protected]
Klipsch School of Electrical Engineering, New México State University, Las Cruces, NM, USA.
[email protected]
Jaime Martínez-Castillo Cristóbal Colón University (UCC), Veracruz, Ver. MEXICO.
[email protected] Abstract In this paper, a low voltage-low noise amplifier is presented. The proposed topology uses a single 1.2V power supply, and has been implemented in a 0.35-µm AMIS CMOS technology. Simulated results of the amplifier showed a noise figure of 1.5dB, a forward gain of 3.5dB with 2.74mW of power consumption. The LNA operates at 2.12GHz, presenting an IIP3 of -15dBm.
ARCHITECTURE PROPOSED The core of the proposed LNA is a Flipped Voltage Follower (FVF), which is coupled with an inductor (Ls), as shown in Figure 1. The main function of this inductor is to resonate with the gate-source capacitance of transistor M1 and and the gate-drain capacitance of transistor M2), and matching the input port with Rs. The input impedance of the LNA is given by:
Keywords CMOS LNA, low noise, low voltage, high-frequency.
Z in ≈ sLS +
(1)
gm CGS
(2)
and the cut-off frequency is:
INTRODUCTION The LNA is the first stage of any communications receiver, and its main function is to overcome the noise problem for the subsequent stages, providing enough gain to make the signal easier to be processed. The LNA design can be considered a challenge, because the requirements of high gain, low noise figure, good input and output matching, and unconditional stability. The input port of the LNA requires an antenna coupling (that generally presents an impedance of 50 ohms), and a 50 ohms impedance the output port (typically implemented using a passive network).
ωT = where, 2 C GS = WLC OX 3
W gm = 2 KI D L
(3)
(4)
The input inductor Lp will resonate with the input impedance of the amplifier, through the parasitic capacitance CGS of M2, and set the operation frequency of the LNA. In order to compute the value of Lp is necessary to satisfy:
Nowadays, designing efforts have focused to obtain high performance with lower manufacturing costs. The present work proposes a new topology which allows to RF LNAs to operate at low voltage, using a CMOS standard technology. The topology is based in the Flipped Voltage Follower [1], a circuit that has been reported in several reports for low voltage operation [10]. This presented topology is tuned in 2.12GHz with gain of 3.5dB, making it feasible in Radio-Frequency (RF) applications, besides being all its elements completely integrated in a single chip. The input impedance is coupled to 50 ohms, and the used inductors are simulated using a standard model [6]. The S and Z parameters have been displayed to show the response of the LNA. The estimated power consumption is lower than 2.74mW.
0-7803-9197-7/05/$20.00 © 2005 IEEE.
1 + ωT L sC GS
ω=
1 LpC GS
(5)
The bias circuit uses three elements: transistor M5, resistor R3 and resistor R4. The width of transistor M5 is a small fraction of M1, in order to minimize the power overhead of the bias circuit. The current through M3 is established by the supply voltage and R3, using the Vgs of M5. The resistor R4 is chosen large enough to have a small equivalent noise current. The element CP is a DC blocking capacitor and prevents upsetting gate to source bias of M1. The CP value must be chosen to have negligible reactance at the signal frequency.
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7.5
VDD
7.0
R2
6.5 6.0
5
5.5
VDD
M3
5.0
R3
dB
R1 1 Vout 6 Vin
Cp
2
3.0 2.5
3
2.0
Ls 4
4.0 3.5
M1
Lp
4.5
1.5
CL
1.0 1.E+10
9.E+09
8.E+09
7.E+09
6.E+09
5.E+09
4.E+09
3.E+09
2.E+09
1.E+09
0.E+00
M2
FREQ
Figure 2. Noise Figure. Figure 1. RF LNA.
Linearity In addition to the noise figure, gain and input match, the LNA design must considerer the linearity, because the output signal must remain linear even when strong signals are being received.
Noise The most commonly accepted definition of the NF (noise figure) is:
NF =
SNR IN SNROUT
When two signals with different frequencies are applied to a nonlinear system, the output in general exhibits some components that are not harmonics of the input frequencies. This phenomenon is called Intermodulation (IM).
(6)
There are many measures of linearity, the most commonly used are third order intercept (IP3). An approximation to compute the IIP3 (input IP3) is showed [3]:
where SNRIN and SNROUT are the signal-to-noise ratios measured at the input and output respectively. NF is a measure of how much the SNR is degraded when a signal passes through a system.
IIP3 ≈
In order to reduce the noise generated by the LNA, the used optimal width is [6]:
WOPT ≈
1 3ωLCOX RS
∆P + Pin 2
(8)
where ∆P is the difference of power between the fundamental signal (L1, in ω1 or ω2) and the intermodulate signal (L2, in 2ω1-ω2 or 2ω2-ω1).
(7)
To estimate the LNA´s IIP3 have been applied two near tones around the main frequency. Figure 3 shows the main signal (L1) and the IM3 signal (third-order Intermodulation, L2). To obtain the IIP3 has been extrapolated the intersection point between both signals. The LNA proposed presents an IIP3 of -15dBm.
The NF of the LNA is showed in Figure 2. At 2.12GHz the LNA presents NF=1.5dB. NFs below 2dB are generally hard to achieve by integrated LNAs [9].
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IIP3 0 -10 -20 Aout (dB)
-30 -40
L1 L2
-50 -60 -70 -80 -90 -50
-45
-40
-35
-30
-25
-20
-15
-10
Ain (dB)
Figure 3. IIP3.
RESULTS The main results achieved of this LNA proposed are presented in Table 1.
Figure 4. Layout of the LNA.
The layout of the LNA proposed is present in Figure 4. All the elements have been integrated in a single chip, includes the two inductors used in this topology and the DC blocking capacitor.
Table 1. LNA parameters achieved
1.2V
Power Consumption
2.74mW
Frequency
2.12GHz
S11
-11.2dB
S12
-20.2dB
S21
3.53dB
S22
-4dB
3.0E+09
1.5dB
2.8E+09
NF
2.6E+09
-15dBm
2.4E+09
IIP3
2.2E+09
26.5 ohms
2.0E+09
ZOUT(re)
S11 S21
1.8E+09
50.3 ohms
5 0 -5 -10 -15 -20 -25 -30 -35 -40 1.6E+09
ZIN(re)
dB
Voltage Supply
FREQ
Figure 5. S11 and S21 of the LNA proposed.
Some LNAs [7,8,9] have reported operation frequencies since 900MHz to 2GHz with voltage supplies above of 2.7V. This topology proposed operates with 1.2V achieving parameters inside the portable and RF communications systems.The two inductors used have been simulated with a model proposed in the literature [6]. The values of Lp and Ls are 16nH and 1nH respectively.
The gain of the LNA is of 3.53dB at 2.12GHz and is showed in Figure 5 with S21 parameter. The value of the reflection coefficient parameter S11 is of -11.2dB at main frequency.
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[4] Behzad Razavi, “A 900-MHz/1.8-GHz CMOS transmitter for dual-band applications”, IEEE, 1998. [5] Fco. Rafael Trejo-Macotela, Tesis de maestría: “Diseño de los elementos de un sistema de conversión a 450MHz para un receptor Armstrong”, INAOE, 2001. [6] Thomas H. Lee, “The Design of CMOS RadioFrequency Integrated Circuits”, Cambridge University Press, 1998. [7] Brian A. Floyd, Jesal Mehta, Carlos Gamero, and Kenneth K. O., “A 900-MHz, 0.8-µm CMOS Low Noise Amplifier with 1.2-dB Noise Figure”, IEEE Custom Integrated Circuits Conference, 1999. [8] Cheon Soo Kim, Min Park, Chung-Hwan Kim, Yeong Cheol Hyeon, Hyun Kyu Yu, Kwyro Lee, and Kee Soo Nam, “A Fully Integrated 1.9-GHz CMOS Low-Noise Amplifier”, IEEE Microwave and Guided Wave Letters, Vol. 8, No. 8, pp. 293-295, august 1998. [9] Qiuting Huang, Paolo Orsatti, Francesco Piazza, “Broadband, 0.25µm CMOS LNAs with Sub-2dB NF for GSM Applications”, IEEE Custom Integrated Circuits Conference, 1998. [10] J.A Galán. R.G. Carvajal, F. Muñoz, A. Torralba, J. Ramírez-Angulo,”Low-Power Low-Voltage Class-AB Linear OTA for HF Filters With A Large Tuning Range”, IEEE - ISCAS 2002.
Ohms
60 55 50 45 40
Zin (R) Zout (R)
35 30 25 20 15 2.6E+09
2.4E+09
2.2E+09
2.0E+09
1.8E+09
1.6E+09
FREQ
Figure 6. Input and output impedances (real part) of the LNA proposed.
To estimate the input and output matching, in Figure 6 are showed the real part of Zin and Zout. The LNA presents a Zin=50 ohms and a Zout=26.5 ohms.
CONCLUSIONS In this work has been presented a novel LNA in low voltage supply. This proposal presents important characteristics inside RF environment. A low power consumption (2.74mW), a low Noise Figure (1.5dB), applications in RF (2.12GHz), and a 50 ohms input matching are achieved with this work proposed. The low voltage requirements (VDD=1.2V) make this amplifier an attractive solution at portable and communications systems. The LNA has been sent to manufacture in order to corroborate its functionality and performance. A circuit prototype, in a 0.35 AMIS process through Europractice, has been sent to fabrication, and experimental results will be included.
ACKNOWLEDGMENTS This work was partially supported by CONACyT under contract 37470-A.
REFERENCES [1] J.Ramírez-Angulo, R.G. Carvajal, A. Torralba, J. Galan, A. P. Vega-Leal and J. Tombs, “The Flipped Voltage Follower: A useful cell for low-voltage lowpower circuit design”, IEEE - ISCAS 2002. [2] Shouli Yan y Edgar Sánchez Sinencio, “Low Voltaje Analog Circuit Design Techniques: A tutorial”, IEICE Trans. Analog Integrated Circuits and Systems, Vol. E00-A, No. 2, pp. 1-17, Febrero 2000. [3] Behzad Razavi, RF Microelectronics, Prentice Hall, 1998.
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