Logic Design

A relational model for confined separation logic

Software Engineering / Object Oriented Programming / Informatics / Semantics / Logic Programming / Relational Algebra / Reasoning / Separation Logic / Relational Model / Shape / Encapsulation / Mathematical Model / Logic Design / Relational calculus / Object Oriented Program / Relational Algebra / Reasoning / Separation Logic / Relational Model / Shape / Encapsulation / Mathematical Model / Logic Design / Relational calculus / Object Oriented Program

A Case Study In Low-Power System-Level Design

Systems Analysis / System Design / Process Design / Real Time Systems / System-level design / Tactile Sensors / Logic Design / Embedded System / Tactile Sensors / Logic Design / Embedded System

Two-dimensional register design using polarization-encoded optical shadow-casting

Optical physics / Logic Design / Electrical And Electronic Engineering

A 1.5 GHz 90 nm embedded microprocessor core

Embedded Systems / VLSI / Very Large Scale Integration / Arm / Low Power / Pipelines / High performance / Circuit Design / High Speed / Logic Design / VLSI Circuits / Micro-Architecture / Cache Coherence / Pipelines / High performance / Circuit Design / High Speed / Logic Design / VLSI Circuits / Micro-Architecture / Cache Coherence

Power- and complexity-aware issue queue designs

Computer Architecture / Computer Hardware / Microcomputers / Logic Design / Electrical And Electronic Engineering / Power Dissipation

Energy efficient comparators for superscalar datapaths

Distributed Computing / Statistics / Computer Hardware / Energy efficiency / Computer Software / Microarchitecture / Frequency / Low Power / Energy Dissipation / Energy efficient / Logic Design / Energy Efficiency / Registers / Instruction Level Parallelism / Logic circuits / Microarchitecture / Frequency / Low Power / Energy Dissipation / Energy efficient / Logic Design / Energy Efficiency / Registers / Instruction Level Parallelism / Logic circuits

Power efficient comparators for long arguments in superscalar processors

Low Power Electronics / Energy efficient / Logic Design / Power Added Efficiency

Designing low-power energy recovery adders based on pass transistor logic

Energy efficiency / Simulation / Frequency / Low Power Electronics / Circuits / Voltage / Energy efficient / Diodes / Logic Design / Energy Efficiency / Latency / Adders / Power Dissipation / Pass transistor logic / Energy recovery / Integrated Circuit Design / Voltage / Energy efficient / Diodes / Logic Design / Energy Efficiency / Latency / Adders / Power Dissipation / Pass transistor logic / Energy recovery / Integrated Circuit Design

A conceptual model for the logical design of temporal databases

Relational Database / Decision Support Systems / Design process / Mathematical Sciences / Conceptual Design / Conceptual Model / Relational Model / Entity Relationship Model / Logic Design / Integrity Constraints / Entity Relationship Diagram / Temporal Database / Conceptual Model / Relational Model / Entity Relationship Model / Logic Design / Integrity Constraints / Entity Relationship Diagram / Temporal Database

Performances comparison between multilevel hierarchical and mesh FPGA interconnects

Electronics / FPGA / Routing / Field-Programmable Gate Arrays / Interconnect / Network Topology / Logic Design / Electrical And Electronic Engineering / Place and Route / Network Topology / Logic Design / Electrical And Electronic Engineering / Place and Route

Memristor-based IMPLY logic design procedure

Logic Design / Logic Gates / Combinational Circuits

Memristor-based IMPLY logic design procedure

Logic Design / Logic Gates / Combinational Circuits

Performances comparison between multilevel hierarchical and mesh FPGA interconnects

Electronics / FPGA / Routing / Field-Programmable Gate Arrays / Interconnect / Programmable Networks / Network Topology / Logic Design / Performance Comparison / Electrical And Electronic Engineering / Place and Route / Programmable Networks / Network Topology / Logic Design / Performance Comparison / Electrical And Electronic Engineering / Place and Route

Performances comparison between multilevel hierarchical and mesh FPGA interconnects

Electronics / FPGA / Routing / Field-Programmable Gate Arrays / Interconnect / Programmable Networks / Network Topology / Logic Design / Performance Comparison / Electrical And Electronic Engineering / Place and Route / Programmable Networks / Network Topology / Logic Design / Performance Comparison / Electrical And Electronic Engineering / Place and Route

A real time programmable encoder for low density parity check code targeting a reconfigurable instruction cell architecture

Sparse Matrices / Low Power Electronics / Real Time / High performance / Encoding / OPTIMIZATION TECHNIQUE / Logic Design / Ultra Low Power / OPTIMIZATION TECHNIQUE / Logic Design / Ultra Low Power
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